1. Field of the Invention
The present invention relates to controlling the error correction ability of a flash memory apparatus, and more particularly, to a method arranged for controlling a memory apparatus and associated memory apparatus and controller thereof
2. Description of the Prior Art
With the rapid development of the flash memory in recent years, various portable memory apparatuses (e.g., memory cards conforming to the SD/MMC, CF, MS and XD standards) are widely applied in a variety of applications. Hence, how to control the access of flash memories in the portable memory apparatuses has gradually become an important issue.
Taking usual NAND flash memories as example, the NAND flash memories may be divided into single-level cell (SLC) and multi-level cell (MLC) flash memories. Each of the transistors in an SLC flash memory that is used as a memory cell only has two electric charge values arranged for representing logic values “0” and “1”, respectively. However, the storage capability of each of the transistors in an MLC flash memory that is used as a memory cell is fully used and is driven with higher voltages, so as to record information of a plurality of bits (e.g., 00, 01, 11, and 10). Theoretically, the recording density of the MLC flash memory may exceed twice the recording density of the SLC flash memory. This is good news for manufacturers of NAND flash memories who face a bottleneck during research and development.
Compared with the SLC flash memory, the price of the MLC flash memory is cheaper, and the MLC flash memory may provide larger storage capacity in a limited space. Hence, the MLC flash memories soon become mainstream memories that are applied in portable memory apparatuses on the market. According to related arts, due to the complex operations of some MLC flash memories, the conventional memory controllers need to be equipped with powerful error correction mechanisms, in order to ensure the correctness of user data. However, some issues are thereby generated. For example, different error correction ability requirements and different designs for the controllers of different products make the related cost (e.g., time and material cost) increase correspondingly. Taking existing products on the market as example, when the design of the memory controllers in the released follow-up products need to be changed/modified, the related cost (e.g., time and material cost) will increase correspondingly. Therefore, there is a need for a novel method arranged for enhancing the control of the data access of flash memories, in order to improve the overall performance without introducing undesired side effects (e.g., errors of stored data).